Saankhya Lab is developing an elastic RAN chip which will be open architecture sidelining the Current Open RAN architecture which still uses COTS (commercially off the shelf) hardware. Therefore, the software developed on top of it is truly interoperable from one chip set maker to another.

https://www.techcircle.in/2021/02/11/saankhya-labs-bets-on-interoperable-chip-for-a-piece-of-5g-open-ran-pie